1. Field of the Invention
The invention relates to a semiconductor device fabricating method, and more particularly to a contact hole fabricating process of a semiconductor device.
2. Description of the Related Art
System-on-a-chip (SoC) designs have become mainstream designs of integrated circuits due to improving semiconductor device scaling processes and critical requirements for dimensions and functions of consumer products. System-on-a-chip (SoC) is a technology that packages of all necessary electronic devices and circuitry, such as, logic devices, memory devices or input/output (I/O) interfaces, for a complete “system” on a single integrated circuit (IC). For example, an SoC fabricating process of a liquid crystal display (LCD) is needed for integrating high voltage (such as, 30 or 40V) metal oxide semiconductor transistors (HVMOS), low voltage or medium voltage (such as, 2.5 or 5V) logic circuits, or non-volatile memory devices in one chip. Therefore, processes integration of high voltage devices, low voltage or medium voltage devices with improving device reliability has become an important challenge due to different device breakdown voltages for each SoC device.
A novel semiconductor device fabricating method integrating different devices is desirable.